The present invention relates to a PCMCIA RF module. More specifically, the present invention relates to a wireless LAN transmitter/receiver utilizing direct sequence spread spectrum (DSSS) technology.
The wireless local area network (LAN) represents a major trend in digital communications technology. IEEE specification 802.11 defines a direct sequence spread spectrum (DSSS) standard for wireless digital communication systems. A type of PCMCIA module which conforms to this standard includes an RF module, which provides the transmit/receive function. The focus of the present invention is the design of such an RF module.
A known configuration for a wireless LAN transmit/receive RF module, utilizing quadrature phase shift keyed (QPSK) modulation, is shown in block diagram form in FIG. 1.
In the receive mode, as selected by the ANT SW command, transmit/receive antenna 100,102 routes a received signal through a DR image filter FL1 to a transmit/receive (TX/RX) switch 1040, within the RF power amplifier and TX/RX switch block 104. The received signal (a QPSK modulated carrier at 2.4 GHz) is then amplified by low noise amplifiers (LNA) 106 and 1080, and filtered again by DR image filter FL2. In the RF/IF converter block 108, the carrier signal is down converted by mixer 1081 and a first local oscillator signal (2.1 GHz) from VCO 118. The down converted output is a 280 MHz IF QPSK signal, which is selectively filtered by channel filter FL3. The IF QPSK signal is then amplified to a constant power level by limiting amplifiers 1101 and 1102, within the Quadrature demodulator/modulator block 110.
A second local oscillator signal (560 MHz) is supplied from VCO 116 to the I/Q LO-1107, where it is digitally divided into an in-phase (I) 280 MHz signal and a 90-degree phase-shifted (Q) 280 MHz signal. The in-phase signal is fed to xe2x80x9cIxe2x80x9d mixer 1103, and the phase-shifted signal is fed to xe2x80x9cQxe2x80x9d mixer 1105. The demodulated I and Q outputs (RXI and RXQ) represent the received baseband signals, and are filtered through low pass filters 1104 and 1106.
In the transmit mode, the process is essentially reversed. Baseband signals TXI and TXQ are filtered through low pass filters 1108 and 1109, and are then quadrature modulated by mixers 1110 and 1111, utilizing in-phase and phase-shifted 280 MHz signals from I/Q LO 1107. The 280 MHz IF QPSK output signal is amplified by amplifier 1112, filtered by channel filter FL5, and up converted by mixer 1083 to 2.4 GHz, in conjunction with the first LO signal (2.1 GHz) from VCO 118 and amplifier 1082. The up converted signal is filtered by DR image filter FL6, amplified by driver amplifier 1084, and filtered again by filter FL7. Finally, it is amplified by Power Amplifier 1041 and routed via switch 1040 and filter FL1 to transmit/receive antenna 100, 102.
There are numerous areas of design considerations for the performance improvement of the above described circuit. Those design areas relevant to the inventive wireless LAN transmitter/receiver disclosed herein are discussed below.
(1) Power Amplifier linearity and stability
An important parameter in the design of a QPSK modulation system is the linearity of the system. A potential source of nonlinearity is the power amplifier (PA) stage, so it is important that the drive level of this stage be maintained within a linear region (typically at least 3 dB below the compression point of the PA).
Another important design consideration for the PA stage is the speed and stability of its on-off switching, since this can be a limiting factor in QPSK performance. Therefore, it is very desirable to provide the PA with a stable, high speed on-off switching control circuit.
A typical prior art Power Amplifier circuit is shown in FIG. 2. GaAs MESFET""s are widely used as power amplifiers in modem communication systems, due to their high efficiency and low distortion characteristics at high power levels. In most applications, two or more stages of power amplifier devices are cascaded to provide high power gain with low driving power. In the prior art circuit of FIG. 2, a 3-stage MESFET amplifier (D1, D2, D3) is shown, with three corresponding gate inputs connected to a resistor network (Rg 11, Rg 12, Rg 21, Rg 22, Rg 31, Rg 32, and variable resistor R_adj). This resistor network provides an appropriate bias voltage to each of the gate inputs (Vg1, Vg2, Vg3, respectively) from a negative voltage supply, such as xe2x88x925 volts. The variable resistor R_adj is used to trim the bias drain current.
In most modem wireless communication systems, the RF output signal is transmitted in bursts. Therefore, the PA stage is turned on only when transmitting, and must be off when receiving. In order to achieve a high transmission rate, the PA stage must be capable of a very high on-off rate. In the circuit of FIG. 2, a P-channel MOSFET Q1 is used as the on-off switching device for PA D1, D2, D3. When Vctrl activates Q1 through resistor R1, Vdd is connected to the drains of PA D1, D2, D3, and the PA stage is turned on. Conversely, when Vctrl turns Q1 off, the PA stage is disconnected from Vdd, and is thus turned off.
A significant disadvantage of this prior art circuit approach is that the on-off switching takes place in the high current side of the PA stage, that is, between the drains and Vdd. For high power, high speed applications, the MOSFET switching device (Q1) must accommodate high current switching and discharging. Such MOSFET devices can be very expensive. Therefore, the circuit architecture of FIG. 2 is not optimal for high power, high speed switching applications.
(2) Antenna select switch circuit
Another important design consideration relates to the port isolation of the antenna select switch circuit. In a typical prior art single pole, double throw RF switching arrangement, as shown in FIG. 3, a common RF in/out port at node C can be switched to either Antenna 1 or Antenna 2, depending on the bias condition of diodes D1 and D2. A switching control voltage (Ant Sel) provides a bias current through the Bias Circuit, which is in series with diode D1, quarter wavelength transmission line MLIN, and diode D2, to ground. When Ant Sel is high, diodes D1 and D2 are forward biased (turned on), so that they act as short circuits to the RF carrier frequency Fo. With diode D2 shorted to ground, quarter wavelength transmission line MLIN reflects an open (high impedance) at node C, thus preventing an RF signal from passing to Antenna 2. At the same time, shorted diode D1 provides a direct path for an RF signal to Antenna 1.
When Ant Sel is low, diodes D1 and D2 are reverse biased (turned off), so that they act as open circuits to the RF carrier frequency. In this case, open circuited diode D1 isolates node C from Antenna 1, while quarter wavelength transmission line MLIN provides a through path due to the open circuited diode D2. Thus, an RF signal at node C is connected to Antenna 2 through
An important disadvantage of the prior art circuit of FIG. 3 is that this circuit is susceptible to diode parasitic effects, which can significantly degrade the port isolation of the off branch. This degradation can occur because diodes D1 and D2 are not perfect switches, due to their capacitive and inductive characteristics, as depicted in FIGS. 4A-4C. FIG. 4A shows the equivalent circuit of a diode model, FIG. 4B represents the diode in its off mode, and FIG. 4C represents the diode in the on mode. Referring to FIG. 4A, the inductor Ls represents the parasitic series inductance in both the on and off modes. The capacitor Cj represents the junction capacitance of the diode, and capacitor Ct represents the parasitic capacitance between cathode and anode terminals. The resistor Ron/Roff represents the diode resistance, depending on the diode mode (on or off).
In the off mode, as shown in FIG. 4B, resistor Ron/Roff is an open circuit, but parasitic capacitor Ct, and junction capacitor Cj in series with parasitic inductor Ls, form possible leakage paths between cathode and anode terminals at the RF carrier frequency Fo. As a result, the port isolation may be significantly degraded.
In the on mode, as shown in FIG. 4C, resistor Ron/Roff is a short circuit around junction capacitor Cj, but parasitic inductance Ls can decrease the short circuit effect of the diode at the RF frequency. Again, the port isolation may be significantly degraded.
Therefore, it is very desirable to provide an antenna select circuit that minimizes the parasitic effects described above.
(3) EMI radiation and susceptibility
Still another very important design consideration for improving receiver performance is the reduction of EMI radiation and susceptibility characteristics of the entire RF module. Considering the compact packaging requirements for this type of RF module (for example, in a mobile phone), it becomes especially important to control the EMI parameters.
One common method of EMI control uses physical shields between different types of circuits (e.g., low power and high power; low frequency and high frequency; etc.) and between the RF module and external noise sources. Recent examples of this type of physical shielding are described in the prior art patents noted below.
In U.S. Pat. No. 5,341,274, Nakatani et al. disclose an EMI suppression technique using an insulation layer and a conductive layer integrated into the printed circuit board design.
In U.S. Pat. No. 5,428,506, Brown et al. disclose an EMI suppression technique using a laminate of lossy material and dielectric material between the voltage supply plane and the ground plane.
In U.S. Pat. No. 5,466,893, Nakatani et al. disclose an EMI suppression technique using one or more insulation layers and conductive layers integrated into the printed circuit board design.
In U.S. Pat. No. 5,500,789, Miller et al. disclose an EMI shielding apparatus with various grounding configurations.
However, any such additions of physical shielding to a compact printed circuit board assembly may increase the size and/or weight of the unit, which is disadvantageous to both the user and the manufacturer.
Accordingly, it is an object of the present invention to overcome the various disadvantages of the prior art, as described above. Moreover, for purposes of disclosure clarification, the inventive features will be divided into two categories, as follows:
(1) Transmitter performance improvement
Power Amplifier stage switching
(2) Receiver performance improvement
Antenna port isolation
EMI suppression
In accordance with an illustrative embodiment of the present invention, a wireless transmitter/receiver RF module is configured on a multi-layer printed circuit assembly. A transmit/receive switching control circuit routes a quadrature phase shift keyed (QPSK) digitally modulated carrier signal to be transmitted from the RF module to a transmit antenna, and, alternately, routes a QPSK modulated carrier signal to be received from a receive antenna to the RF module receive channel.
A received signal is first amplified by a two-stage low noise amplifier, and is then down converted from RF to IF in conjunction with a first local oscillator signal. The IF signal is then demodulated in conjunction with a second local oscillator signal, and the baseband I and Q signals are extracted.
A transmit signal begins with baseband I and Q signals being inputted to the transmit channel of the RF module. The I and Q signals are vector modulated onto an IF signal in conjunction with the second local oscillator. The modulated IF signal is then up converted to RF in conjunction with the first local oscillator signal. The modulated RF signal is then amplified in a power amplifier stage, and routed to the transmit antenna.
An inventive feature of the power amplifier stage relates to the bias control circuit of the power amplifier. A multi-stage GaAs MESFET is used for the power amplifier, due to its gate control characteristic, which achieves rapid turn off when a sufficient negative control voltage is applied to the gate circuit. A transistor controlled voltage divider network provides either on or off gate control voltages to the power amplifier gate circuit, resulting in high-speed, low power, highly stable switching control. Thus, transmitter performance is enhanced without the need for high cost switching devices.
A synthesizer circuit, locked to a reference oscillator, includes dual phase locked voltage controlled oscillators (VCO""s), which provide the first and second local oscillator signals to the RF/IF converters and to the quadrature demodulator/modulator, respectively.
Parasitic suppression circuits are inserted into the antenna switching control circuit, and EMI suppression and isolation components are inserted into the quadrature demodulator/modulator circuit and the synthesizer circuit. These inventive circuit modifications improve antenna port isolation, attenuate power supply noise, and suppress spurious radiation. Thus, receiver performance is improved, and less physical shielding is required on the printed circuit board assembly.
An illustrative embodiment of the present invention is more fully described below in conjunction with the following drawings.